firtool-1.93.0

What's Changed

• [Moore] Add explicit truncation and zero/sign-extension by @fabianschuiki in #7783
• [ESI][Services] Type comparisons should account for 'any' by @teqdruid in #7774
• [ESI][Services] Standard host memory service by @teqdruid in #7775
• [FIRRTL] InferRW: copy all attributes of masked memeories by @youngar in #7793
• [SMT] Add reset op by @TaoBi22 in #7791
• [FIRRTL] Make memory matadata work with layers by @seldridge in #7789
• [ESI][Runtime] Fix wheel builds by @teqdruid in #7795
• [FIRRTL] Only emit retime metadata for design by @seldridge in #7798
• [FIRRTL] Only add SiTest metadata for design by @seldridge in #7799
• [firtool] mv LoweLayers after CreateSiFiveMetadata by @seldridge in #7794
• [FIRRTL] Emitting EICG wrapper warning only once by @prithayan in #7785
• [FIRRTL] Don't force non-local trackers in Dedup. by @mikeurbach in #7709
• [FIRRTL] FIRParser: Speed up creation subaccess operations by @youngar in #7802
• [circt-verilog] Support MLIR and MLIRBC input files by @fabianschuiki in #7787
• [FIRRTL] Run canonicalizer again after IMCP by @rwy7 in #7796
• Revert "[FIRRTL] Don't force non-local trackers in Dedup." by @mikeurbach in #7805
• [FIRRTL] Add layer support to ExtractInstances by @seldridge in #7807
• [HW] Add a verifier for HWInstanceLike by @prithayan in #7782
• [ESI] Implement basic hostmem reads lacking a bunch of functionality by @teqdruid in #7803
• [FIRRTL] Bump nextFIRVersion to 4.0.0 in the parser by @fabianschuiki in #7808
• [FIRRTL] Move LowerLayers after ExtractInstances by @seldridge in #7809
• [FIRRTL] Document how to deal with specification releases by @fabianschuiki in #7811
• [HandshakeToDC] Add pack/unpack lowering patterns by @mortbopet in #6941
• [Transform] Create memory banks for memories used inside affine parallel loops by @jiahanxie353 in #7804
• [firtool] Run CSE on classes by @youngar in #7814
• [FIRRTL] Dedup: speed up handling of instances by @youngar in #7815
• [FIRRTL] Dedup: record less indices when hashing by @youngar in #7816
• [ExportVerilog] Do not inline non-procedural continuous assignments to variables by @fzi-hielscher in #7817
• [Seq] FIFO: permit any type and add read latency by @teqdruid in #7810
• [PyCDE] Binding for FIFOs by @teqdruid in #7806

Full Changelog: firtool-1.92.0...firtool-1.93.0

firtool-1.92.0

What's Changed

• [LTL] Canonicalize ltl.and to comb.and for i1 properties by @fabianschuiki in #7759
• [FIRRTL] Fix folding of when conditions into LTL properties by @fabianschuiki in #7760
• [FIRRTL] Make sym_name an inherent attr for symbol ops by @youngar in #7765
• [SV] Use SymbolOpUserInterface to speed up verifiers by @youngar in #7768
• [HW] InnerSymbolTable: only check top-level ops for portlists by @youngar in #7767
• [Calyx] Passing memories by reference by @jiahanxie353 in #7164
• [circt-test] Add simple runner interface for choosing modes and depth by @leonardt in #7763
• Bump LLVM to 8193832fb988e3df1e8e726634783805dca8d9b6. by @mikeurbach in #7749
• [Calyx] constant op by @jiahanxie353 in #7770
• [MooreToCore] Add support for moore::string_constant #7628 by @jpinot in #7752
• [FIRRTL] ReplSeqMems: use the original mem name for the instance name by @youngar in #7776
• [FIRRTL] Add new ModulePrefixAnnotation by @youngar in #7772
• [HW] Make module's doNotPrint a UnitAttr by @rwy7 in #7777
• [FreezePaths] Add support for HWInstanceLike, instead of only HWInstanceOp by @prithayan in #7778
• [FIRRTL] Return an empty ArrayRef, not an array of 1 attr by @rwy7 in #7779
• [FIRRTL] use properties in some builders and parsers by @youngar in #7766
• [firtool] Run layer merge after inliner by @rwy7 in #7780

New Contributors

• @jpinot made their first contribution in #7752

Full Changelog: firtool-1.91.0...firtool-1.92.0

firtool-1.91.0

What's Changed

• [FIRRTL] Remove validation from type inference code by @youngar in #7747
• [Arc] Improve LowerState to never produce read-after-write conflicts by @fabianschuiki in #7703
• [Arc] Remove obsolete arc.clock_tree and arc.passthrough ops by @fabianschuiki in #7704
• [arcilator] Add clock divider integration test by @fabianschuiki in #7705
• [Verif] Adjust contract ops to match documentation by @fabianschuiki in #7745
• [AIGToComb] [circt-synth] Add a AIG to Comb conversion pass by @uenoku in #7742
• [OM] Add a new API to update fields of a ClassOp by @prithayan in #7748
• [FIRRTL][LowerTypes] Keep the order of bundle fields in lowered cat by @SpriteOvO in #6376
• [FIRRTL] enable properties for inherent attributes by @youngar in #7750
• Calyx ConstantOp Support by @jiahanxie353 in #7086
• Transform Flatten Memref Load by @jiahanxie353 in #7298
• [Verif][NFC] Use auto-generated constructors for all passes by @fabianschuiki in #7754
• Flatten memref GetGlobal and Global operations by @jiahanxie353 in #7093
• [circt-test] Add test discovery classes and -l option by @fabianschuiki in #7755
• [circt-test] Add simple SymbiYosys test runner by @fabianschuiki in #7756
• [HW] Add port name accessors to HWInstanceLike by @maerhart in #7757
• Flatten memref Global and its corresponding GetGlobal operations by @jiahanxie353 in #7758
• Calyx Binary Floating Point AddF Operator by @jiahanxie353 in #7089
• [SCFToCalyx] Build control for nested if operation by @jiahanxie353 in #7669
• [Verif] Add ignore attribute to formal by @leonardt in #7719

Full Changelog: firtool-1.90.1...firtool-1.91.0

firtool-1.90.1

What's Changed

• [Verif] Add LowerFormalToHW pass by @leonardt in #7707
• [CombFolds] Preserve two-state attribute in narrowOperationWidth by @fzi-hielscher in #7712
• Bump LLVM to 92663defb1c27d809f644752d65d8ccff93a7054. by @mikeurbach in #7714
• [ESI] Promote and generalize 'channel assignments' by @teqdruid in #7715
• [docs] Fix broken image links in docs by @Ivecia in #7710
• [FIRRTL] Convert CheckLayers to use InstanceInfo by @seldridge in #7635
• [OM] Rework ClassOp to use fields terminator by @leonardt in #7537
• [HW][Seq] Allow typed attr to be an element of aggregate_constant and make seq.const_clock typed attr by @uenoku in #7718
• Advanced LayerSink by @rwy7 in #7548
• [FIRRTL] Use InstanceInfo in CreateSiFiveMetadata by @seldridge in #7720
• [FIRRTL][LayerSink] Fix: initialize an unitialized bool member by @rwy7 in #7724
• [HWToSMT] Proper error message for 0-bit constants by @maerhart in #7727
• [circt-bmc] Add simple initial value support to ExternalizeRegisters by @TaoBi22 in #7728
• Reject '<=' and 'is invalid' if FIRRTL version >=3 by @seldridge in #7733
• [FIRRTL] clean up interfaces for supporting properties by @youngar in #7734
• Use properties for attributes for many dialects by @youngar in #7736
• [AIG][circt-synth] Add a boilarplate for the dialect and tool by @uenoku in #7737
• [AIG] Add AndInverterOp by @uenoku in #7738
• [AIG] Add LowerVariadic and LowerWordToBits passes by @uenoku in #7739
• [CombToAIG] Add CombToAIG conversion pass by @uenoku in #7740
• [circt-synth] Populate pipelines until AIG lowering by @uenoku in #7741
• [AIG] Add CutOp by @uenoku in #7743
• [circt-lec] Register Verif dialect by @uenoku in #7744
• [circt-bmc] Add initial_values attribute to BMC op by @TaoBi22 in #7729
• [Verif] Add contract examples to dialect doc by @fabianschuiki in #7723
• [OM] Add ClassOp region verifier by @seldridge in #7746

New Contributors

• @Ivecia made their first contribution in #7710

Full Changelog: firtool-1.89.0...firtool-1.90.1

firtool-1.89.0

What's Changed

• [Verif] Simplify the FormalOp by @fabianschuiki in #7691
• [Sim][NFC] Include InferTypeOpInterface in SimOps.td by @fabianschuiki in #7693
• [MooreToCore] Support assert, assume, cover ops by @mingzheTerapines in #7681
• [MooreToCore] Add support for format strings and display task by @fabianschuiki in #7694
• [ExtractInstances] Add the extract instances metadata to OM Classes by @prithayan in #7667
• [FIRRTL] collection of changes to InferWidths by @youngar in #7686
• [FIRRTL] InferWidths: fix invalid frame reference by @youngar in #7697
• [ArcToLLVM] Add support for index dialect by @fabianschuiki in #7699
• [Arc] Add arc.final op by @fabianschuiki in #7700
• [Arc] Make arc.model have an SSACFG region by @fabianschuiki in #7701
• Remove redundant CMakeLists.txt entry by @leonardt in #7696
• [FIRRTL][ProbesToSignals] RWProbe support by @dtzSiFive in #7706
• [Arc] Add dominance-aware pass to sink ops and merge scf.if ops by @fabianschuiki in #7702

Full Changelog: firtool-1.88.0...firtool-1.89.0

firtool-1.88.0

What's Changed

• [LLHD][HW] Implement SROA interfaces by @maerhart in #7672
• [FIRRTL] InferResets: properly lower FART'd registers by @youngar in #7680
• [OM] Update FreezePaths to handle object fields with paths. by @mikeurbach in #7683
• [JSON] Leave json::OStream in valid state on failure by @fabianschuiki in #7684
• Add unit test discovery and execution tool by @fabianschuiki in #7685
• [FIRRTL] Print port names attributes if a port has an empty name by @rwy7 in #7688
• [FIRRTL] Ensure LowerClasses respects alt base path for local paths. by @mikeurbach in #7690

Full Changelog: firtool-1.87.0...firtool-1.88.0

firtool-1.85.1

Full Changelog: firtool-1.85.0...firtool-1.85.1

firtool-1.87.0

What's Changed

• [FIRRTL] Make IMCP work with Layers by @seldridge in #7598
• [HW] Add reduction patterns to trim port list of top-level module by @maerhart in #7587
• [Arc] Fully support initialization through seq.initial by @uenoku in #7605
• [CMake] Consistently declare conversion libraries and simplify circt-opt link target list by @maerhart in #7610
• LLVM Bump by @maerhart in #7609
• [Moore] Add assert, assume, and cover ops. by @hailongSun2000 in #7589
• [FIRRTL] Allow local targets to be multiply-instantiated. by @mikeurbach in #7613
• [FIRRTL] Add InstanceInfo Analysis by @seldridge in #7612
• [LLHD][TCM] Simplify region directly by @maerhart in #7615
• [LLHD] Make process lowering best-effort and allow constants from outside the region by @maerhart in #7617
• [FIRRTL] Add features, cleanup InstanceInfo (again) by @seldridge in #7618
• Add verif.bmc VerifToSMT lowering by @TaoBi22 in #7603
• [SV] Add MacroRefOp to represet macro statement by @uenoku in #7607
• [MooreToCore] Alternative conditional lowering and type conversion fixes by @maerhart in #7625
• [circt-bmc] Add circt-bmc tool by @TaoBi22 in #7621
• [MooreToCore] Return early on non-convertable type by @maerhart in #7631
• [LLHD] Add DesequentializationPass by @maerhart in #7616
• [LLHD] Add Sig2Reg pass for graph regions by @maerhart in #7623
• [Moore] Drop named_constant op in favor of dbg.variable by @fabianschuiki in #7624
• [ImportVerilog] Add support for elaboration system tasks by @fabianschuiki in #7632
• [FIRRTL] Add verifier of single MarkDUTAnnotation by @seldridge in #7633
• [FIRRTL] Inliner: Support for ops with regions. by @dtzSiFive in #7398
• [firtool] Move LowerLayers later in pipeline. by @dtzSiFive in #7639
• [FIRRTL] Use walk, InstanceInfo in AddSeqMemPorts by @seldridge in #7599
• Bump LLVM to 556ec4a7261447d13703816cd3730a891441e52c. by @mikeurbach in #7641
• [ImportVerilog] Add support for $stop/$finish/$exit by @fabianschuiki in #7634
• [DC] Adding dc-print-dot pass by @luisacicolini in #7619
• [FIRRTL] Avoid InstanceGraphNode* in InstanceInfo by @seldridge in #7643
• [ImportVerilog] Add $display/$write/$info/$warning/$error/$fatal by @fabianschuiki in #7642
• [ImportVerilog] Add support for $clog2 by @fabianschuiki in #7645
• [FIRRTL] Error mixed DUT mems in AddSeqMemPorts by @seldridge in #7622
• [ImportVerilog] Support assignment patterns with integer type by @fabianschuiki in #7646
• [ImportVerilog] Insert missing conversions around instance ports by @fabianschuiki in #7647
• [FIRRTL][LowerLayers] Remove handling of some ref ops by @rwy7 in #7640
• [Analysis] Add OpCount Analysis by @TaoBi22 in #7644
• [Arc] Fix folding of initialized StateOp by @fzi-hielscher in #7653
• [Transforms][OpCountAnalysis] Add PrintOpCountPass by @TaoBi22 in #7654
• [MooreToCore] Lower moore.net to llhd.sig by @fabianschuiki in #7652
• [FIRRTL] Re-implement old EmitOMIR ports logic in LowerClasses. by @mikeurbach in #7651
• [Seq][Arc] Allow seq.initial to take immutable operands. Add a cast operation by @uenoku in #7656
• [FIRRTL] Add integer shift left property op by @maerhart in #7657
• [arcilator] Register Verif dialect by @owlxiao in #7655
• [OM] Add integer shift left op by @maerhart in #7658
• [FIRRTL] Add integer shift left parser support by @maerhart in #7659
• [FIRRTL] Add integer shift left conversion to LowerClasses by @maerhart in #7660

New Contributors

• @owlxiao made their first contribution in #7655

Full Changelog: firtool-1.86.0...firtool-1.87.0

firtool-1.86.0

What's Changed

• [FIRRTL][FIRParser] Check force source more. by @dtzSiFive in #7574
• Make sure type conversion materialization callbacks return values of the correct type by @maerhart in #7583
• Bump LLVM by @maerhart in #7572
• [python] Add walk_with_filter to walk subset of IR by @uenoku in #7591
• [FIRRTL][GrandCentral] Remove legacy Augmented types. by @dtzSiFive in #7592
• [python] Fix clang-tidy warnings in walk_with_filter, NFC by @uenoku in #7594
• [FIRRTL] Convert LowerMemory to walk by @seldridge in #7596
• LLVM Bump by @maerhart in #7595
• [FIRRTL] Change InferReadWrite to use a walk, error if it sees WhenOps by @seldridge in #7597

Full Changelog: firtool-1.85.0...firtool-1.86.0

firtool-1.62.1

What's Changed

• [FIRRTL] LowerToHW: guard against folded operations (#7358) (backport) by @dtzSiFive in #7590

Full Changelog: firtool-1.62.0...firtool-1.62.1