AdaptIve Profiling Hw Sub-system (AIPHS)

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Installation Instructions

OVERVIEW

AIPHS, acronym of Adaptive Profiling HW Sub-system, is basically conceived to support designers on the development of On-Chip Monitoring Systems (OCMSs) able to satisfy given Monitorability Requirements, namely requirements about possibility to observe the behaviour of a system with the goal of collecting metrics (e.g. related to execution time), without inserting SW overhead. It is a flexible framework that targets SoCs implemented on Field Programmable Gate Arrays (FPGAs), or on Integrated Circuits (ICs) integrating some reconfigurable logics.

WEBSITE

TBD

DOWNLOAD

Official Git repository: https://[email protected]/alkalir/aiphs.git

INSTALLATION

1. Copy and paste the AIPHS folder in the working directory of your VHDL project
2. Insert the component declaration in the VHDL module where the monitoring system is connected to
3. Build the whole system using an FPGA synthesis tool

SYSTEM REQUIREMENTS

For using Xilinx FPGAs, Xilinx ISE Design suite or Xilinx Vivado Design Suite software.

For using Intel FPGAs, Intel Quartus software.

RELEASE NOTES

Latest Release: 1.0.0

SUPPORT

email: [email protected]

Getting started guidelines

EXAMPLES

There are examples related to LEON3.